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ETS   2010 IEEE European Test Symposium
Wall of Fame | Most Viewed ETS-2010 Paper
ETS
2010
IEEE
174views Hardware» more  ETS 2010»
13 years 4 months ago
Test-architecture optimization for TSV-based 3D stacked ICs
Testing of 3D stacked ICs (SICs) is becoming increasingly important in the semiconductor industry. In this paper, we address the problem of test architecture optimization for 3D s...
Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakr...
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