EUROPAR 2010 - PDF Preprint Papers

EUROPAR 2010 International Euro-Par Conference

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EUROPAR
2010
Springer

413views Distributed And Parallel Com...» more EUROPAR 2010»

Maestro: Data Orchestration and Tuning for OpenCL Devices

13 years 5 months ago

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Abstract. As heterogeneous computing platforms become more prevalent, the programmer must account for complex memory hierarchies in addition to the difficulties of parallel program...

Kyle Spafford, Jeremy S. Meredith, Jeffrey S. Vett...

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Id	Views	Title	Status

1	413	Maestro: Data Orchestration and Tuning for OpenCL Devices	claim
2	392	Thread Owned Block Cache: Managing Latency in Many-Core Architecture	claim
3	305	Multithreaded Geant4: Semi-automatic Transformation into Scalable Thread-Parallel Software	claim
4	247	Multi-GPU and Multi-CPU Parallelization for Interactive Physics Simulations	claim
5	243	cTrust: Trust Aggregation in Cyclic Mobile Ad Hoc Networks	claim
6	237	A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures	claim
7	211	Source-to-Source Optimization of CUDA C for GPU Accelerated Cardiac Cell Modeling	claim
8	189	Optimized Dense Matrix Multiplication on a Many-Core Architecture	claim
9	189	Parallel Enumeration of Shortest Lattice Vectors	claim
10	178	Hierarchical Work-Stealing	claim
11	172	Estimating and Exploiting Potential Parallelism by Source-Level Dependence Profiling	claim
12	170	Exceptions for Algorithmic Skeletons	claim
13	169	Collaborative Cellular-Based Location System	claim
14	168	Starsscheck: A Tool to Find Errors in Task-Based Parallel Programs	claim
15	166	Transactional Mutex Locks	claim
16	165	Sampling Bias in BitTorrent Measurements	claim
17	162	Profile-Driven Selective Program Loading	claim
18	161	Ants in Parking Lots	claim
19	160	The x-Wait-Freedom Progress Condition	claim
20	158	Meaningful Metrics for Evaluating Eventual Consistency	claim
21	157	Value-Based Sequential Consistency for Set Objects in Dynamic Distributed Systems	claim
22	157	Power-Efficient Spilling Techniques for Chip Multiprocessors	claim
23	157	A Language-Based Tuning Mechanism for Task and Pipeline Parallelism	claim
24	155	Toward Real-Time, Many-Task Applications on Large Distributed Systems	claim
25	150	A Fast 5/2-Approximation Algorithm for Hierarchical Scheduling	claim
26	146	Optimized On-Chip-Pipelined Mergesort on the Cell/B.E	claim
27	145	Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture	claim
28	145	Analysis of Multi-Organization Scheduling Algorithms	claim
29	143	A Model for Space-Correlated Failures in Large-Scale Distributed Systems	claim
30	143	A Parallel Implementation of the Jacobi-Davidson Eigensolver and Its Application in a Plasma Turbulence Code	claim
31	142	Generators-of-Generators Library with Optimization Capabilities in Fortress	claim
32	134	Mobile and Ubiquitous Computing	claim
33	130	Non-clairvoyant Scheduling of Multiple Bag-of-Tasks Applications	claim
34	128	High Performance Architectures and Compilers	claim
35	128	Peer-to-Peer Computing	claim
36	120	Robust Self-stabilizing Construction of Bounded Size Weight-Based Clusters	claim
37	120	User Transparent Task Parallel Multimedia Content Analysis	claim
38	111	Overlay Management for Fully Distributed User-Based Collaborative Filtering	claim

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