ICCD 2000 - PDF Preprint Papers

ICCD 2000 International Conference on Computer Design

Teaser Browsing | Click Here

Title Browsing | Click Here

Wall of Fame | Most Viewed ICCD-2000 Paper

click to vote

ICCD
2000
IEEE

159views Hardware» more ICCD 2000»

Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures

13 years 9 months ago

Download lca.ece.utexas.edu

This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...

Deependra Talla, Lizy Kurian John, Viktor S. Lapin...

claim paper

Read More »

Disclaimer and Copyright Notice

Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.

Id	Views	Title	Status

1	159	Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures	claim
2	137	Skewed CMOS: Noise-Immune High-Performance Low-Power Static Circuit Family	claim
3	135	A Methodology and Tool for Automated Transformational High-Level Design Space Exploration	claim
4	125	Architectural Support for Dynamic Memory Management	claim
5	124	Processors for Mobile Applications	claim
6	123	Analysis and Optimization of Ground Bounce in Digital CMOS Circuits	claim
7	120	Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation	claim
8	119	Source-Level Transformations for Improved Formal Verification	claim
9	116	Representing and Scheduling Looping Behavior Symbolically	claim
10	107	Architectural Impact of Secure Socket Layer on Internet Servers	claim
11	106	Fast Subword Permutation Instructions Using Omega and Flip Network Stages	claim
12	103	Efficient Place and Route for Pipeline Reconfigurable Architectures	claim
13	99	Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems	claim
14	96	AMULET3: A 100 MIPS Asynchronous Embedded Processor	claim
15	95	Analysis of Shared Memory Misses and Reference Patterns	claim
16	94	A Selective Temporal and Aggressive Spatial Cache System Based on Time Interval	claim
17	94	A Decompression Architecture for Low Power Embedded Systems	claim
18	94	Synthesis and Optimization of Interface Hardware between IP's Operating at Different Clock Frequencies	claim
19	93	Cheap Out-of-Order Execution Using Delayed Issue	claim
20	88	Efficient Design Error Correction of Digital Circuits	claim
21	88	Dynamic Flip-Flop with Improved Power	claim
22	87	A Register File with Transposed Access Mode	claim
23	87	Binary and Multi-Valued SPFD-Based Wire Removal in PLA Networks	claim
24	86	DRAM-Page Based Prediction and Prefetching	claim
25	84	Rectilinear Block Placement Using B*-Trees	claim
26	80	Power-Sensitive Multithreaded Architecture	claim
27	79	Efficient Logic Optimization Using Regularity Extraction	claim
28	75	Hybridizing and Coalescing Load Value Predictors	claim
29	69	Hierarchical Simulation of a Multiprocessor Architecture	claim
30	50	Output Prediction Logic: A High-Performance CMOS Design Technique	claim

Sciweavers

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers