ISLPED 2009 - PDF Preprint Papers

ISLPED 2009 International Symposium on Low Power Electronics and Design

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ISLPED
2009
ACM

211views Hardware» more ISLPED 2009»

PPT: joint performance/power/thermal management of DRAM memory for multi-core systems

13 years 11 months ago

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With the popularity of multi-core architecture, to sustain the memory demands from diﬀerent cores, the memory system is expected to grow signiﬁcantly in both speed and capacit...

Chung-Hsiang Lin, Chia-Lin Yang, Ku-Jei King

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Id	Views	Title	Status

1	211	PPT: joint performance/power/thermal management of DRAM memory for multi-core systems	claim
2	188	Transaction-based adaptive dynamic voltage scaling for interactive applications	claim
3	184	Online work maximization under a peak temperature constraint	claim
4	178	Power management in energy harvesting embedded systems with discrete service levels	claim
5	171	Adaptive RF chain management for energy-efficient spatial-multiplexing MIMO transmission	claim
6	168	Low power circuit design based on heterojunction tunneling transistors (HETTs)	claim
7	168	A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management	claim
8	161	Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches	claim
9	154	Experimental analysis of sequence dependence on energy saving for error tolerant image processing	claim
10	136	Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator	claim
11	134	The design of a bloom filter hardware accelerator for ultra low power systems	claim
12	132	Enabling ultra low voltage system operation by tolerating on-chip cache failures	claim
13	127	Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic	claim
14	125	Behavior-level observability don't-cares and application to low-power behavioral synthesis	claim
15	123	Predict and act: dynamic thermal management for multi-core processors	claim
16	122	Power-saving color transformation of mobile graphical user interfaces on OLED-based displays	claim
17	118	Serial sub-threshold circuits for ultra-low-power systems	claim
18	116	Dynamic power gating with quality guarantees	claim
19	111	Tracking the power in an enterprise decision support system	claim
20	110	End-to-end validation of architectural power models	claim
21	110	SOI, interconnect, package, and mainboard thermal characterization	claim
22	108	Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits	claim
23	100	Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits	claim
24	98	vGreen: a system for energy efficient computing in virtualized environments	claim
25	97	Minimizing data center cooling and server power costs	claim
26	97	A high-performance low-power nanophotonic on-chip network	claim

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