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MEMOCODE   2007 ACM/IEEE International Conference on Formal Methods and Models for Co-Design
Wall of Fame | Most Viewed MEMOCODE-2007 Paper
MEMOCODE
2007
IEEE
10 years 7 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
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