SLIP   2005 International Workshop on System-Level Interconnect Prediction
Wall of Fame | Most Viewed SLIP-2005 Paper
10 years 19 days ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
Disclaimer and Copyright Notice
Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.
1Download preprint from source248
2Download preprint from source127
3Download preprint from source122
4Download preprint from source118
5Download preprint from source113
6Download preprint from source83
7Download preprint from source65