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VLSI   2005 VLSI Engineering: Beyond Software Engineering
Wall of Fame | Most Viewed VLSI-2005 Paper
VLSI
2005
Springer
10 years 9 months ago
Pareto Points in SRAM Design Using the Sleepy Stack Approach
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption a...
Jun-Cheol Park, Vincent John Mooney III
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