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ICCD
2003
IEEE
147views Hardware» more  ICCD 2003»
14 years 1 months ago
Design Flow Enhancements for DNA Arrays
DNA probe arrays have recently emerged as one of the core genomic technologies. Exploiting analogies between manufacturing processes for DNA arrays and for VLSI chips, we demonstr...
Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu ...
ICCD
2007
IEEE
205views Hardware» more  ICCD 2007»
14 years 1 months ago
Hardware libraries: An architecture for economic acceleration in soft multi-core environments
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
David Meisner, Sherief Reda
ICCD
2008
IEEE
420views Hardware» more  ICCD 2008»
14 years 1 months ago
Frequency and voltage planning for multi-core processors under thermal constraints
— Clock frequency and transistor density increases have resulted in elevated chip temperatures. In order to meet temperature constraints while still exploiting the performance op...
Michael Kadin, Sherief Reda
RECOMB
2003
Springer
14 years 4 months ago
Engineering a scalable placement heuristic for DNA probe arrays
Andrew B. Kahng, Ion I. Mandoiu, Pavel A. Pevzner,...
DAC
2005
ACM
14 years 5 months ago
Power-aware placement
Lowering power is one of the greatest challenges facing the IC industry today. We present a power-aware placement method that simultaneously performs (1) activity-based register c...
Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sher...