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ISPASS
2005
IEEE

Fast, Accurate Microarchitecture Simulation Using Statistical Phase Detection

13 years 9 months ago
Fast, Accurate Microarchitecture Simulation Using Statistical Phase Detection
Simulation-based microarchitecture research is often hindered by the slow speed of simulators. In this work, we propose a novel statistical technique to identify highly representative unique behaviors or phases in a benchmark based on its IPC (instructions committed per cycle) trace. By simulating the timing of only the unique phases, the cycle-accurate simulation time for the SPEC suite is reduced from 5 months to 5 days, with a significant retention of the original dynamic behavior. Evaluation across many processor configurations within the same architecture family shows that the algorithm is robust. A cost function is provided that enables users to easily optimize the parameters of the algorithm for either simulation speed or accuracy depending on preference. A new measure is introduced to quantify the ability of a simulation speedup technique to retain behavior realized in the original workload. Unlike a first order statistic such as mean value, the newly introduced measure capt...
Ram Srinivasan, Jeanine Cook, Shaun Cooper
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ISPASS
Authors Ram Srinivasan, Jeanine Cook, Shaun Cooper
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