JPG - A Partial Bitstream Generation Tool to Support Partial Reconfiguration in Virtex FPGAs

Reconfigurable computing based on partial reconfiguration of field programmable gate arrays (FPGAs) is yet to move to the mainstream of computing. Hardware devices that support such reconfiguration are now available but no readily available software exists to generate the required partial bitstreams. The JPG tool described in this paper is a Java-based partial bitstream generator designed to fit within the standard Xilinx FPGA design flow. JPG, based on the Xilinx JBits API, is able to generate partial bitstreams for Xilinx Virtex devices based on data extracted from the standard Xilinx CAD tool flow.

• Type: Conference
• Year: 2002
• Where: IPPS
• Authors: Anup Kumar Raghavan, Peter Sutton
• Keywords: Distributed And Parallel Computing, IPPS 2002, Partial Bitstreams, Standard Xilinx, Xilinx