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PDP
2002
IEEE

A Parametrized Algorithm that Implements Sequential, Causal, and Cache Memory Consistency

13 years 8 months ago
A Parametrized Algorithm that Implements Sequential, Causal, and Cache Memory Consistency
In this paper we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it has a parameter that allows to choose the consistency model to be implemented. As far as we know, this is the first algorithm proposed that implements cache coherence. In our algorithm, when implementing causal and cache consistency all read and write operations are executed locally (i.e., are fast). It is known that no sequential algorithm has only fast memory operations. However, in our algorithm, when implementing sequential consistency all write operations and some read operations are fast. The algorithm uses propagation and full replication, where values written by a process are propagated to the rest of processes. It works in a cyclic turn fashion, with each process of the DSM system broadcasting one message in its turn. The values written by the process are sent in the message (instead of sending one messag...
Ernesto Jiménez, Antonio Fernández,
Added 15 Jul 2010
Updated 15 Jul 2010
Type Conference
Year 2002
Where PDP
Authors Ernesto Jiménez, Antonio Fernández, Vicent Cholvi
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