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DATE
1999
IEEE

Symmetric Transparent BIST for RAMs

13 years 8 months ago
Symmetric Transparent BIST for RAMs
The paper introduces the new concept of symmetric transparent BIST for RAMs. This concept allows to skip the signature prediction phase of conventional transparent BIST approaches and therefore yields a significant reduction of test time. The hardware cost and the fault coverage of the new scheme remain comparable to that of a traditional transparent BIST scheme. In many cases, experimental studies even show a higher fault coverage obtained in shorter test time.
Sybille Hellebrand, Hans-Joachim Wunderlich, Vyach
Added 03 Aug 2010
Updated 03 Aug 2010
Type Conference
Year 1999
Where DATE
Authors Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik
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