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LCTRTS
1998
Springer

A Design Environment for Counterflow Pipeline Synthesis

13 years 7 months ago
A Design Environment for Counterflow Pipeline Synthesis
The Counterflow Pipeline (CFP) organization may be a good target for synthesis of application-specific microprocessors for embedded systems because it has a regular and simple structure. This paper describes a design environment for tailoring CFP's to an embedded application to improve performance. Our system allows exploring the design space of all possible CFP's for a given embedded application to understand the impact of different design decisions on performance. We have used the environment to derive heuristics that help to find the best CFP for an application. Preliminary results using our heuristics indicate that speed-up for several
Bruce R. Childers, Jack W. Davidson
Added 06 Aug 2010
Updated 06 Aug 2010
Type Conference
Year 1998
Where LCTRTS
Authors Bruce R. Childers, Jack W. Davidson
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