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DAC
2005
ACM

A design platform for 90-nm leakage reduction techniques

13 years 5 months ago
A design platform for 90-nm leakage reduction techniques
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on leakage reduction techniques but also on their deployment as a worldwide infrastructure as the added-value resides not only in the techniques themselves but also in the way they are implemented to build an efficient, re-usable, robust, low cost and portable platform. Techniques have been silicon proven on the 90-nm TI CMOS technology and is commonly used to design SoC with complexities over 100 Million transistors Categories and Subject Descriptors B.7.2 [Design Aids]: Integrated Circuits, Design Aids General Terms Design,Verification Keywords SoC Design, Leakage Power Management, Wireless Application processor
Philippe Royannez, Hugh Mair, Franck Dahan, Mike W
Added 13 Oct 2010
Updated 13 Oct 2010
Type Conference
Year 2005
Where DAC
Authors Philippe Royannez, Hugh Mair, Franck Dahan, Mike Wagner, Mark Streeter, Laurent Bouetel, Joel Blasquez, H. Clasen, G. Semino, Julie Dong, D. Scott, B. Pitts, Claudine Raibaut, Uming Ko
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