Built-in Self-Test for Memory Resources in Virtex-4 Field Programmable Gate Arrays

ABSTRACT: We present a Built-In Self-Test (BIST) approach for programmable embedded memories in Xilinx Virtex-4 Field Programmable Gate Arrays (FPGAs). The target resources are the block random access memories (RAMs) in all of their modes of operation including single- and dual-port RAM, first-in first-out (FIFO), error correcting code (ECC), and cascade modes of operation. The BIST architecture and configurations needed to test these block RAMs are presented with implementation, fault detection, and timing analysis.1

• Type: Conference
• Year: 2009
• Where: CATA
• Authors: Brooks R. Garrison, Daniel T. Milton, Charles E. Stroud
• Keywords: Block Random Access, CATA 2007, CATA 2009, Programmable Embedded Memories, Programmable Gate Arrays