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DAC
1999
ACM

Power Efficient Mediaprocessors: Design Space Exploration

14 years 4 months ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a category of processors that are programmable yet optimized to reduce power consumption for a specific set of applications. The key components of the framework presented in this paper are a retargetable instruction level parallelism (ILP) compiler, processor simulators, a set of complete media applications written in a high level language and an architectural component selection algorithm. The fundamental idea behind the framework is that with the aid of a retargetable ILP compiler and simulators it is possible to arrange architectural parameters (e.g., the issue width, the size of cache memory units, the number of execution units, etc.) to meet low power design goals under area constraints.
Johnson Kin, Chunho Lee, William H. Mangione-Smith
Added 13 Nov 2009
Updated 13 Nov 2009
Type Conference
Year 1999
Where DAC
Authors Johnson Kin, Chunho Lee, William H. Mangione-Smith, Miodrag Potkonjak
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