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CAV
2010
Springer

ABC: An Academic Industrial-Strength Verification Tool

9 years 4 months ago
ABC: An Academic Industrial-Strength Verification Tool
ABC is a public-domain system for logic synthesis and formal verification of binary logic circuits appearing in synchronous hardware designs. ABC combines scalable logic transformations based on And-Inverter Graphs (AIGs), with a variety of innovative algorithms. A focus on the synergy of sequential synthesis and sequential verification leads to improvements in both domains. This paper introduces ABC, motivates its development, and illustrates its use in formal verification.
Robert K. Brayton, Alan Mishchenko
Added 06 Dec 2010
Updated 06 Dec 2010
Type Conference
Year 2010
Where CAV
Authors Robert K. Brayton, Alan Mishchenko
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