Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

10

FPL
1999
Springer

favoriteEmaildiscussreport

88views Hardware» more FPL 1999»

Accelerating Boolean Implications with FPGAs

13 years 8 months ago

Accelerating Boolean Implications with FPGAs

Download eis.eit.uni-kl.de

Kolja Sulimma, Dominik Stoffel, Wolfgang Kunz

Real-time Traffic

FPL 1999 | Hardware |

claim paper

Related Content

» Improved SATbased Boolean matching using implicants for LUTbased FPGAs

» Hardware libraries An architecture for economic acceleration in soft multicore environment...

» VERILAT verification using logic augmentation and transformations

Post Info
More Details (n/a)

Added	04 Aug 2010
Updated	04 Aug 2010
Type	Conference
Year	1999
Where	FPL
Authors	Kolja Sulimma, Dominik Stoffel, Wolfgang Kunz

Comments (0)