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2003
IEEE

Active Memory Techniques for ccNUMA Multiprocessors

9 years 7 months ago
Active Memory Techniques for ccNUMA Multiprocessors
Our recent work on uniprocessor and single-node multiprocessor (SMP) active memory systems uses address remapping techniques in conjunction with extended cache coherence protocols to improve access locality in processor caches. We extend our previous work in this paper and introduce the novel concept of multi-node active memory systems. We present the design of multi-node active memory cache coherence protocols to help reduce remote memory latency and improve scalability of matrix transpose and parallel reduction on distributed shared memory (DSM) multiprocessors. We evaluate our design on seven applications through execution-driven simulation on small and medium-scale multiprocessors. On a 32-processor system, an active-memory optimized matrix transpose attains
Daehyun Kim, Mainak Chaudhuri, Mark Heinrich
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where IPPS
Authors Daehyun Kim, Mainak Chaudhuri, Mark Heinrich
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