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ICCD
2008
IEEE

Adaptive techniques for leakage power management in L2 cache peripheral circuits

12 years 2 months ago
Adaptive techniques for leakage power management in L2 cache peripheral circuits
— Recent studies indicate that a considerable amount of an L2 cache leakage power is dissipated in its peripheral circuits, e.g., decoders, word-lines and I/O drivers. In addition, L2 cache is becoming larger, thus increasing the leakage power. This paper proposes two adaptive architectural techniques (ADM and ASM) to reduce leakage in the L2 cache peripheral circuits. The adaptive techniques use the product of cache hierarchy miss rates to guide the leakage control in accordance with program behavior. The result for SPEC2K benchmarks show that the first technique (ASM) achieves a 34% average
Houman Homayoun, Alexander V. Veidenbaum, Jean-Luc
Added 15 Mar 2010
Updated 15 Mar 2010
Type Conference
Year 2008
Where ICCD
Authors Houman Homayoun, Alexander V. Veidenbaum, Jean-Luc Gaudiot
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