Address-branch correlation: A novel locality for long-latency hard-to-predict branches

Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between memory and microprocessors, such long-latency branch mispredictions also waste substantial power/energy in executing instructions on wrong paths, especially for large instruction window processors. This paper presents a novel program locality that can be exploited to handle long-latency hard-topredict branches. The locality is a result of an interesting program execution behavior: for some applications, major data structures or key components of the data structures tend to remain stable for a long time. If a hard-to-predict branch depends on such stable data, the address of the data rather than the data value is sufficient to determine the branch outcome. This way, a misprediction can be resolved much more promptly when the data access results in a long-latency cache miss. We call such locality addressbranch...

• Type: Conference
• Year: 2008
• Where: HPCA
• Authors: Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zhou
• Keywords: Auxiliary Branch Predictor, Computer Architecture, HPCA 2008, Locality Addressbranch Correlation, Major Data Structures