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SIGMETRICS
1990
ACM

An Analytical Model of Multistage Interconnection Networks

13 years 7 months ago
An Analytical Model of Multistage Interconnection Networks
Multiprocessors require an interconnection network to connect processors with memory modules. The performance of the interconnection network can have a large effect upon overall system performance, and, therefore, methods are needed to model and compare alternative network architectures. This paper is concerned with evaluating the performance of multistage interconnection networks consisting of k X s switching elements. Examples of such networks include omega, binary ncube and baseline networks. We consider clocked, packet switched networks with buffers at switch output ports. An analytical model based on approximate Mean Value Analysis is developed, then validated through simulations.
Darryl L. Willick, Derek L. Eager
Added 11 Aug 2010
Updated 11 Aug 2010
Type Conference
Year 1990
Where SIGMETRICS
Authors Darryl L. Willick, Derek L. Eager
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