Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

9

GLVLSI
2007
IEEE

favoriteEmaildiscussreport

154views VLSI» more GLVLSI 2007»

Analyzing and modeling process balance for sub-threshold circuit design

13 years 10 months ago

Analyzing and modeling process balance for sub-threshold circuit design

Download people.virginia.edu

Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun

Real-time Traffic

GLVLSI 2007 | VLSI |

claim paper

Related Content

» Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to E...

» Automatic and manual processes in enduser multimedia authoring tools where is the balance

» Analysis and mitigation of process variation impacts on PowerAttack Tolerance

» System and Framework for QA of Process Design Kits

» A comprehensive approach to modeling characterizing and optimizing for metastability in FP...

» A Process for Resolving Performance TradeOffs in ComponentBased Architectures

» Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits

» Efficient statistical analysis of read timing failures in SRAM circuits

» Statistical Performance Modeling and Optimization

Post Info
More Details (n/a)

Added	02 Jun 2010
Updated	02 Jun 2010
Type	Conference
Year	2007
Where	GLVLSI
Authors	Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun

Comments (0)