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DFT
2008
IEEE

Arbitrary Error Detection in Combinational Circuits by Using Partitioning

9 years 5 months ago
Arbitrary Error Detection in Combinational Circuits by Using Partitioning
The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilizes a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.
Osnat Keren, Ilya Levin, Vladimir Ostrovsky, Beni
Added 29 May 2010
Updated 29 May 2010
Type Conference
Year 2008
Where DFT
Authors Osnat Keren, Ilya Levin, Vladimir Ostrovsky, Beni Abramov
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