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6

IEICET
2010

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An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture

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An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture

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Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama

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Added	26 Jan 2011
Updated	26 Jan 2011
Type	Journal
Year	2010
Where	IEICET
Authors	Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama

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