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FMCAD
2008
Springer

Augmenting a Regular Expression-Based Temporal Logic with Local Variables

13 years 6 months ago
Augmenting a Regular Expression-Based Temporal Logic with Local Variables
The semantics of temporal logic is usually defined with respect to a word representing a computation path over a set of atomic propositions. A temporal logic formula does not control the behavior of the atomic propositions, it merely observes their behavior. Local variables are a twist on this approach, in which the user can declare variables local to the formula and control their behavior from within the formula itself. Local variables were introduced in 2002, and a formal semantics was given to them in the context of SVA, the assertion language of SystemVerilog, in 2004. That semantics suffers from several drawbacks. In particular, it breaks distributivity of the operators corresponding to intersection and union. In this paper we present a formal semantics for local variables that solves that problem and others, and compare it to the previous solution.
Cindy Eisner, Dana Fisman
Added 26 Oct 2010
Updated 26 Oct 2010
Type Conference
Year 2008
Where FMCAD
Authors Cindy Eisner, Dana Fisman
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