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2009
IEEE

Automatic generation of streaming datapaths for arbitrary fixed permutations

9 years 9 months ago
Automatic generation of streaming datapaths for arbitrary fixed permutations
Abstract—This paper presents a technique to perform arbitrary fixed permutations on streaming data. We describe a parameterized architecture that takes as input n data points streamed at a rate of w per cycle, performs a permutation over all n points, and outputs the result in the same streaming format. We describe the system and its requirements mathematically and use this mathematical description to show that the datapaths resulting from our technique can sustain a full throughput of w words per cycle without stalling. Additionally, we provide an algorithm to configure the datapath for a given permutation and streaming width. Using this technique, we have constructed a full synthesis system that takes as input a permutation and a streaming width and outputs a register-transfer level Verilog description of the datapath. We present an evaluation of our generated designs over varying problem sizes and streaming widths, synthesized for a Xilinx Virtex-5 FPGA.
Peter A. Milder, James C. Hoe, Markus Püschel
Added 20 May 2010
Updated 20 May 2010
Type Conference
Year 2009
Where DATE
Authors Peter A. Milder, James C. Hoe, Markus Püschel
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