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DAC
2010
ACM

Automatic multithreaded pipeline synthesis from transactional datapath specifications

8 years 11 months ago
Automatic multithreaded pipeline synthesis from transactional datapath specifications
We present a technique to automatically synthesize a multithreaded in-order pipeline from a high-level unpipelined datapath specification. This work extends the previously proposed transactional specification (T-spec) and synthesis technology (Tpiper). The technique not only works with instruction processors but also flexible enough to accept any sequential datapath. It maintains previously proposed non-threaded pipeline features and is enhanced with multithreading features. We report a design space exploration study of 32 multithreaded x86 processor pipelines, all synthesized from a single T-spec. Categories and Subject Descriptors B.5.2 [Hardware]: Design Aids
Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timo
Added 06 Dec 2010
Updated 06 Dec 2010
Type Conference
Year 2010
Where DAC
Authors Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam
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