Avoiding Hazards for Speed-Independent Logic Design

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Avoiding Hazards for Speed-Independent Logic Design
- In the speed-independent logic, the hazards caused by input inverters are identified. The known methods of the elimination of such hazards are based on avoiding input inverters. In contrast, we propose the method that produces hazard-free circuits with combined (both right and inverse) input signals. It is shown that such circuits are competitive (in terms of complexity) to ones implemented using either right or inverse input signals. The method is intended for incorporation into the current synthesis methodology.
Igor Lemberski
Added 07 Nov 2010
Updated 07 Nov 2010
Type Conference
Year 2007
Where WCE
Authors Igor Lemberski
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