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ISPASS
2005
IEEE

Balancing Performance and Reliability in the Memory Hierarchy

10 years 8 months ago
Balancing Performance and Reliability in the Memory Hierarchy
Cosmic-ray induced soft errors in cache memories are becoming a major threat to the reliability of microprocessor-based systems. In this paper, we present a new method to accurately estimate the reliability of cache memories. We have measured the MTTF (Mean-Time-ToFailure) of unprotected first-level (L1) caches for twenty programs taken from SPEC2000 benchmark suite. Our results show that a 16 KB first-level cache possesses a MTTF of at least 400 years (for a raw error rate of 0.002 FIT/bit.) However, this MTTF is significantly reduced for higher error rates and larger cache sizes. Our results show that for selected programs, a 64 KB first-level cache is more than 10 times as vulnerable to soft errors versus a 16 KB cache memory. Our work also illustrates that the reliability of cache memories is highly application-dependent. Finally, we present three different techniques to reduce the susceptibility of first-level caches to soft errors by two orders of magnitude. Our analysis sh...
Hossein Asadi, Vilas Sridharan, Mehdi Baradaran Ta
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ISPASS
Authors Hossein Asadi, Vilas Sridharan, Mehdi Baradaran Tahoori, David R. Kaeli
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