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A cache-based internet protocol address lookup architecture

9 years 9 months ago
A cache-based internet protocol address lookup architecture
This paper proposes a novel Internet Protocol (IP) packet forwarding architecture for IP routers. This architecture is comprised of a non-blocking Multizone Pipelined Cache (MPC) and of a hardware-supported IP routing lookup method. The paper also describes a method for expansion-free software lookups. The MPC achieves lower miss rates than those reported in the literature. The MPC uses a two-stage pipeline for a half-prefix/half-full address IP cache that results in lower activity than conventional caches. MPC's updating technique allows the IP routing lookup mechanism to freely decide when and how to issue update requests. The effective miss penalty of the MPC is reduced by using a small nonblocking buffer. This design caches prefixes but requires significantly less expansion of the routing table than conventional prefix caches. The hardware-based IP lookup mechanism uses a Ternary Content Addressable Memory (TCAM) with a novel Hardware-based Longest Prefix Matching (HLPM) meth...
Soraya Kasnavi, Paul Berube, Vincent C. Gaudet, Jo
Added 09 Dec 2010
Updated 09 Dec 2010
Type Journal
Year 2008
Where CN
Authors Soraya Kasnavi, Paul Berube, Vincent C. Gaudet, José Nelson Amaral
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