A case for dynamic frequency tuning in on-chip networks

Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for multicores/CMPs. However, NoCs can be plagued by higher power consumption and degraded throughput if the network and router are not designed properly. Towards this end, this paper proposes a novel router architecture, where we tune the frequency of a router in response to network load to manage both performance and power. We propose three dynamic frequency tuning techniques, FreqBoost, FreqThrtl and FreqTune, targeted at congestion and power management in NoCs. As enablers for these techniques, we exploit Dynamic Voltage and Frequency Scaling (DVFS) and the imbalance in a generic router pipeline through time stealing. Experiments using synthetic workloads on a 8x8 wormhole-switched mesh interconnect show that FreqBoost is a better choice for reducing average latency (maximum 40%) while, FreqThrtl provides the max...

• Type: Conference
• Year: 2009
• Where: MICRO
• Authors: Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar Iyer, Narayanan Vijaykrishnan, Chita R. Das
• Keywords: Generic Router Pipeline, Hardware, MICRO 2009, Router, Scalable Communication Backbones