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2007
ACM

CellSort: High Performance Sorting on the Cell Processor

11 years 7 months ago
CellSort: High Performance Sorting on the Cell Processor
In this paper we describe the design and implementation of CellSort − a high performance distributed sort algorithm for the Cell processor. We design CellSort as a distributed bitonic merge with a data-parallel bitonic sorting kernel. In order to best exploit the architecture of the Cell processor and make use of all available forms of parallelism to achieve good scalability, we structure CellSort as a three-tiered sort. The first tier is a SIMD (single-instruction multiple data) optimized bitonic sort, which sorts up to 128KB of items that cat fit into one SPE’s (a co-processor on Cell) local store. We design a comprehensive SIMDization scheme that employs data parallelism even for the most fine-grained steps of the bitonic sorting kernel. Our results show that, SIMDized bitonic sorting kernel is vastly superior to other
Bugra Gedik, Rajesh Bordawekar, Philip S. Yu
Added 09 Jun 2010
Updated 09 Jun 2010
Type Conference
Year 2007
Where VLDB
Authors Bugra Gedik, Rajesh Bordawekar, Philip S. Yu
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