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CAL
2007

Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture

13 years 3 months ago
Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture
—Flash memory solid state disk (SSD) is gaining popularity and replacing hard disk drive (HDD) in mobile computing systems such as ultra mobile PCs (UMPCs) and notebook PCs because of lower power consumption, faster random access, and higher shock resistance. One of the key challenges in designing a high-performance flash memory SSD is an efficient handling of small random writes to non-volatile data whose performance suffers from the inherent limitation of flash memory that prohibits in-place update. In this paper, we propose a high performance Flash/FRAM hybrid SSD architecture called Chameleon. In Chameleon, metadata used by the flash translation layer (FTL), a software layer in the flash memory SSD, is maintained in a small FRAM since this metadata is a target of intensive small random writes, whereas the bulk data is kept in the flash memory. Performance evaluation based on an FPGA implementation of the Chameleon architecture shows that the use
Jinhyuk Yoon, Eyee Hyun Nam, Yoon Jae Seong, Hongs
Added 12 Dec 2010
Updated 12 Dec 2010
Type Journal
Year 2007
Where CAL
Authors Jinhyuk Yoon, Eyee Hyun Nam, Yoon Jae Seong, Hongseok Kim, B. S. Kim, Sang Lyul Min, Yookun Cho
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