On-Chip Inductance Issues in Multiconductor Systems

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On-Chip Inductance Issues in Multiconductor Systems
As the family of Alpha microprocessors continues to scale into more advanced technologies with very high frequency edge rates and multiple layers of interconnect, the issue of characterizing inductive effects and providing a chip-wide design methodology becomes an increasingly complex problem. To address this issue, a test chip has been fabricated to evaluate various conductor configurations and verify the correctness of the simulation approach. The implementation of and results from this test chip are presented in this paper. Furthermore the analysis has been extended to the upcoming EV7 microprocessor, and important aspects of the derivation of its design methodology, as pertains to these inductive effects, are discussed. Keywords Alpha microprocessor, semiconductor, interconnect, buses, inductance, resistance, capacitance, RLC, noise, cross-talk, transmission line.
Shannon V. Morton
Added 02 Aug 2010
Updated 02 Aug 2010
Type Conference
Year 1999
Where DAC
Authors Shannon V. Morton
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