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ISVLSI
2007
IEEE

CMP-aware Maze Routing Algorithm for Yield Enhancement

9 years 6 months ago
CMP-aware Maze Routing Algorithm for Yield Enhancement
— Chemical-Mechanical Polishing (CMP) is one of the key steps during nanometer VLSI manufacturing process where minimum variation of layout pattern densities is desired. This paper proposes a novel Optimal Maze Routing (OMR) algorithm which optimizes the layout uniformity as well as other routing objectives. The presented routing algorithm is optimal in the sense that it can find routing solutions for nets with minimum wire length, minimum number of vias and minimized layout uniformity-related cost. Experimental results show that compared with a previous routing algorithm, OMR can reduce the total number of vias by up to 24%. Except for the great improvement considering wire length and vias, the proposed routing algorithm also contributes a lot to minimizing the pattern density variation. Since current area fill methods are mostly based on fixed-dissection regime which cannot find the optimal filling solution for all possible floating windows, the proposed routing algorithm mak...
Hailong Yao, Yici Cai, Xianlong Hong
Added 04 Jun 2010
Updated 04 Jun 2010
Type Conference
Year 2007
Where ISVLSI
Authors Hailong Yao, Yici Cai, Xianlong Hong
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