Sciweavers

Share
VLSI
2005
Springer

Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint

10 years 9 months ago
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
1 The increasing test data volume required to ensure high test quality when testing a System-on-Chip is becoming a problem since it (the test data volume) must fit the ATE (Automatic Test Equipment) memory. In this paper, we (1) define a test quality metric based on fault coverage, defect probability and number of applied test vectors, and (2) a test data truncation scheme. The truncation scheme combines (1) test data (vector) selection for each core based on our metric, and (2) scheduling of the execution of the selected test data, in such a way that the system test quality is maximized, while the selected test data is guaranteed to fit the ATE’s memory. We have implemented the technique and the experimental results, produced at reasonable CPU times, on several ITC’02 benchmarks show that high test quality can be achieved by a careful selection of test data.
Erik Larsson, Stina Edbom
Added 28 Jun 2010
Updated 28 Jun 2010
Type Conference
Year 2005
Where VLSI
Authors Erik Larsson, Stina Edbom
Comments (0)
books