Communication optimizations for global multi-threaded instruction scheduling

The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several limit studies, most of the parallelization opportunities require looking for parallelism beyond local regions of code. To exploit these opportunities, especially for sequential applications, researchers have recently proposed global multi-threaded instruction scheduling techniques, including DSWP [16] and GREMIO [15]. These techniques simultaneously schedule instructions from large regions of code, such as arbitrary loop nests or whole procedures, and have been shown to be effective at extracting threads for many applications. A key enabler of these global instruction scheduling techniques is the MultiThreaded Code Generation (MTCG) algorithm proposed in [16], which generates multi-threaded code for any partition of the instructions into threads. This algorithm inserts communication and synchronization instructi...

• Type: Conference
• Year: 2008
• Where: ASPLOS
• Authors: Guilherme Ottoni, David I. August
• Keywords: ASPLOS 2008, Instruction Scheduling Techniques, Instructions, Programming Languages, Synchronization Instructions