A compact digital amplitude modulator in 90nm CMOS

—This paper presents a 90 nm CMOS digital amplitude modulator for polar transmitter. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achieving -26.1 dB EVM and 18% efficiency. To reduce the aliases due to the discrete-time to continuous-time conversion a 2-fold interpolation has been implemented. The amplitude modulator has a segmented architecture. This results in a very compact 0.007 mm2 chip area.

• Type: Conference
• Year: 2010
• Where: DATE
• Authors: V. Chironi, Björn Debaillie, Andrea Baschirotto, Jan Craninckx, M. Ingels
• Keywords: Amplitude Modulator, DATE 2010, Digital Amplitude Modulator, Hardware, OFDM 64QAM Modulation