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2004
IEEE

Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads

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Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads
Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication using hardware support have been proposed, there is relatively little work on exploiting the potential of compiler optimization. Building on recent research on compiler optimization of scalar value communication between speculative threads, we propose compiler techniques for the optimization of memory-resident values. In TLS, data dependences through memory-resident values are tracked by the underlying hardware and preserved by re-executing any speculative thread that violates a dependence; however, reexecution incurs a large performance penalty and should be used only to resolve data dependences that are infrequent. In contrast, value communication for frequently-occurring data dependences must be very efficient. In this paper, we propose using the compiler to first identify frequently-occurring memory-resid...
Antonia Zhai, Christopher B. Colohan, J. Gregory S
Added 20 Aug 2010
Updated 20 Aug 2010
Type Conference
Year 2004
Where CGO
Authors Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry
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