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2002
IEEE

A Complete Data Scheduler for Multi-Context Reconfigurable Architectures

10 years 3 months ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. The main goal is to improve the applications execution time minimizing external memory transfers. Some amount of on-chip data storage is assumed to be available in the reconfigurable architecture. Therefore the Complete Data Scheduler tries to optimally exploit this storage, saving data and result transfers between on-chip and external memories. In order to do this, specific algorithms for data placement and replacement have been designed. We also show that a suitable data scheduling could decrease the number of transfers required to implement the dynamic reconfiguration of the system.
Marcos Sanchez-Elez, Milagros Fernández, Ra
Added 14 Jul 2010
Updated 14 Jul 2010
Type Conference
Year 2002
Where DATE
Authors Marcos Sanchez-Elez, Milagros Fernández, Rafael Maestre, Román Hermida, Nader Bagherzadeh, Fadi J. Kurdahi
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