A Component Oriented Simulator for HW/SW Co-Designs

In order to extensively explore design space one has to specify a n a very abstract level. Transforming a specification into a correct implementation is usually an error prone task. Moreover, want to specify a system on different abstraction levels. This work introduces a component oriented simulator approach that comprises AsmL based executable specifications. Test cases are automatically generated from the specification. Concurrent verification techniques are used to run the specification in parallel with the implementation. Feasibility of such rapid specifying techniques is proved by simulating a 3D graphics engine for the UC Irvine MorphoSys SIMD system-on-chip.

• Type: Conference
• Year: 2003
• Where: ESTIMEDIA
• Authors: Alexander Paar, Haitao Du, Nader Bagherzadeh
• Keywords: Concurrent Verification Techniques, Error Prone Task, ESTIMEDIA 2003, Rapid Specifying Techniques