Constructive, Deterministic Implementation of Shared Memory on Meshes

This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. At the core of the simulation is a Hierarchical Memory Organization Scheme (HMOS), which governs the distribution of the shared variables, each replicated into multiple copies, among the memory modules, through a cascade of bipartite graphs. Based on the expansion properties of such graphs, we devise a protocol that accesses any n-tuple of shared variables in worst-case time O ? n1=2+ , for any constant > 0, using O ? 1= 1:59 copies per variable, or in worst-case time O ? n1=2 logn , using O ? log1:59 n copies per variable. In both cases the access time is close to the natural O ?p n lower bound imposed by the network diameter. A key feature of the scheme is that it can be made fully constructive when m is not too large, thus providing in this case the rst e cient, constructive, deterministic scheme in the ...

• Type: Journal
• Year: 2000
• Where: SIAMCOMP
• Authors: Andrea Pietracaprina, Geppino Pucci, Jop F. Sibeyn
• Keywords: Memory Organization Scheme, Shared Variables, SIAMCOMP 2000, Worst-case Time