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IEEEPACT
2009
IEEE

Core-Selectability in Chip Multiprocessors

9 years 9 months ago
Core-Selectability in Chip Multiprocessors
Abstract--The centralized structures necessary for the extraction of instruction-level parallelism (ILP) are consuming progressively smaller portions of the total die area of chip multiprocessors (CMP). The reason for this is that scaling these structures does not enhance general performance as much as scaling the cache and interconnect. However, the fact that these structures now consume less proportional die area opens an avenue to enhancing their performance through truly overcoming the one-size-fits-all approach to their design. This paper proposes core-selectability
Hashem Hashemi Najaf-abadi, Niket Kumar Choudhary,
Added 19 Feb 2011
Updated 19 Feb 2011
Type Journal
Year 2009
Where IEEEPACT
Authors Hashem Hashemi Najaf-abadi, Niket Kumar Choudhary, Eric Rotenberg
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