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DAC
2010
ACM

Cost-aware three-dimensional (3D) many-core multiprocessor design

9 years 6 months ago
Cost-aware three-dimensional (3D) many-core multiprocessor design
The emerging three-dimensional integrated circuit (3D IC) is beneficial for various applications from both area and performance perspectives. While the general trend in processor design has been shifting from multi-core to many-core, questions such as whether 3D integration should be adopted, and how to choose among various design options must be addressed at the early design stage. In order to guide the final design towards a cost-effective direction, system-level cost evaluation is one of the most critical issues to be considered. In this paper, we propose a 3D many-core multiprocessor cost model, which includes wafer, bonding, package, and cooling cost analysis. Using the proposed cost model, we evaluate the optimal partitioning strategies for 16-, 32- and 64-core multiprocessors from the cost point of view.1 Categories and Subject Descriptors B.7.1 [Types and Design Styles]: Microprocessors and microcomputers General Terms Design, Economics Keywords Cost Modeling, Many-core pro...
Jishen Zhao, Xiangyu Dong, Yuan Xie
Added 15 Aug 2010
Updated 15 Aug 2010
Type Conference
Year 2010
Where DAC
Authors Jishen Zhao, Xiangyu Dong, Yuan Xie
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