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2008
IEEE

CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework

9 years 7 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures, gate-oxide wearout, and transient faults are becoming increasingly common. In order to overcome these issues and develop robust design techniques for large-market silicon ICs, it is necessary to rely on accurate failure analysis frameworks which enable design houses to faithfully evaluate both the impact of a wide range of potential failures and the ability of candidate reliable mechanisms to overcome them. Unfortunately, while failure rates are already growing beyond economically viable limits, no fault analysis framework is yet available that is both accurate and can operate on a complex integrated system. To address this void, we present CrashTest, a fast, highfidelity and flexible resiliency analysis system. Given a hardware description model of the design under analysis, CrashTest is capable of orche...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan
Added 15 Mar 2010
Updated 15 Mar 2010
Type Conference
Year 2008
Where ICCD
Authors Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar, Valeria Bertacco, Todd M. Austin
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