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ASPLOS
1998
ACM

Data Speculation Support for a Chip Multiprocessor

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Data Speculation Support for a Chip Multiprocessor
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the support for threadlevel speculation on the Hydra chip multiprocessor (CMP). The support consists of a number of software speculation control handlers and modifications to the shared secondary cache memory system of the CMP. This support is evaluated using five representative integer applications. Our results show that the speculative support is only able to improve performance when there is a substantial amount of medium–grained loop-level parallelism in the application. When the granularity of parallelism is too small or there is little inherent parallelism in the application, the overhead of the software handlers overwhelms any potential performance benefits from speculative-thread parallelism. Overall, thread-level speculation still appears to be a promising approach for expanding the class of applicatio...
Lance Hammond, Mark Willey, Kunle Olukotun
Added 05 Aug 2010
Updated 05 Aug 2010
Type Conference
Year 1998
Where ASPLOS
Authors Lance Hammond, Mark Willey, Kunle Olukotun
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