Defect or Variation? Characterizing Standard Cell Behavior at 90nm and below

Historically, design margin and defects have been viewed as different topics, one part of design and the other part of test. Shrinking process geometries are making the two part of a continuum. This paper discusses the leakage and delay behavior associated with classic resistive defects and compares it with transistor variation due to lithography.

• Type: Conference
• Year: 2007
• Where: ISQED
• Authors: Robert C. Aitken
• Keywords: Classic Resistive Defects, Design Margin, Hardware, ISQED 2007, Process Geometries