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2002
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Design and Analysis of a Dynamically Reconfigurable Network Processor

9 years 5 months ago
Design and Analysis of a Dynamically Reconfigurable Network Processor
The combination of high-performance processing power and flexibility found in network processors (NPs) has made them a good solution for today’s packet processing needs. Similarly, the emerging technology of reconfigurable computing (RC) has made advances in packet processing as well as other point-solution markets. Current NP designs offer configurable elements but generally do not use dynamic RC techniques for run-time reconfiguration. Incorporating RC into NP designs to enhance packet processing is a natural progression for both of these emerging technologies. This paper presents the simulation results of a novel design for a RCenhanced NP based on the Intel IXP1200 NIC design philosophy. The enhanced NP’s performance is compared to that of the baseline NP in terms of three normalized traffic patterns and a case-study traffic pattern based on a military application. The results demonstrate that the enhanced NP significantly outperforms the baseline NP design in terms of latency...
Ian A. Troxel, Alan D. George, Sarp Oral
Added 15 Jul 2010
Updated 15 Jul 2010
Type Conference
Year 2002
Where LCN
Authors Ian A. Troxel, Alan D. George, Sarp Oral
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