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DSD
2007
IEEE

Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation

13 years 10 months ago
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
This paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces significantly the NFG’s memory size. However, larger k requires more logic elements and multipliers. To quantify this tradeoff, we introduce the FPGA utilization measure, and then determine the optimum polynomial order k. Experimental results show that: 1) for low accuracies (up to 17 bits), 1st order polynomial approximations produce the most efficient implementations; and 2) for higher accuracies (18 to 24 bits), 2nd-order polynomial approximations produce the most efficient implementations.
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where DSD
Authors Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
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